Intel Xeon Phi Processor High Performance Programming

Intel Xeon Phi Processor High Performance Programming
Author: James Jeffers,James Reinders,Avinash Sodani
Publsiher: Morgan Kaufmann
Total Pages: 662
Release: 2016-05-31
ISBN 10: 0128091959
ISBN 13: 9780128091951
Language: EN, FR, DE, ES & NL

Intel Xeon Phi Processor High Performance Programming Book Review:

This book is an all-in-one source of information for programming the Second-Generation Intel Xeon Phi product family also called Knights Landing. The authors provide detailed and timely Knights Landingspecific details, programming advice, and real-world examples. The authors distill their years of Xeon Phi programming experience coupled with insights from many expert customers — Intel Field Engineers, Application Engineers, and Technical Consulting Engineers — to create this authoritative book on the essentials of programming for Intel Xeon Phi products. Intel® Xeon PhiTM Processor High-Performance Programming is useful even before you ever program a system with an Intel Xeon Phi processor. To help ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi processors, or other high-performance microprocessors. Applying these techniques will generally increase your program performance on any system and prepare you better for Intel Xeon Phi processors. A practical guide to the essentials for programming Intel Xeon Phi processors Definitive coverage of the Knights Landing architecture Presents best practices for portable, high-performance computing and a familiar and proven threads and vectors programming model Includes real world code examples that highlight usages of the unique aspects of this new highly parallel and high-performance computational product Covers use of MCDRAM, AVX-512, Intel® Omni-Path fabric, many-cores (up to 72), and many threads (4 per core) Covers software developer tools, libraries and programming models Covers using Knights Landing as a processor and a coprocessor

Intel Xeon Phi Processor High Performance Programming

Intel Xeon Phi Processor High Performance Programming
Author: James Jeffers,James Reinders,Avinash Sodani
Publsiher: Morgan Kaufmann
Total Pages: 662
Release: 2016-07-01
ISBN 10: 9780128091944
ISBN 13: 0128091940
Language: EN, FR, DE, ES & NL

Intel Xeon Phi Processor High Performance Programming Book Review:

This book is an all-in-one source of information for programming the Second-Generation Intel Xeon Phi product family also called Knights Landing. The authors provide detailed and timely Knights Landingspecific details, programming advice, and real-world examples. The authors distill their years of Xeon Phi programming experience coupled with insights from many expert customers Intel Field Engineers, Application Engineers, and Technical Consulting Engineers to create this authoritative book on the essentials of programming for Intel Xeon Phi products. "Intel(r) Xeon Phi Processor High-Performance Programming" is useful even before you ever program a system with an Intel Xeon Phi processor. To help ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi processors, or other high-performance microprocessors. Applying these techniques will generally increase your program performance on any system and prepare you better for Intel Xeon Phi processors. A practical guide to the essentials for programming Intel Xeon Phi processorsDefinitive coverage of the Knights Landing architecturePresents best practices for portable, high-performance computing and a familiar and proven threads and vectors programming modelIncludes real world code examples that highlight usages of the unique aspects of this new highly parallel and high-performance computational productCovers use of MCDRAM, AVX-512, Intel(r) Omni-Path fabric, many-cores (up to 72), and many threads (4 per core)Covers software developer tools, libraries and programming modelsCovers using Knights Landing as a processor and a coprocessor"

Intel Xeon Phi Coprocessor High Performance Programming

Intel Xeon Phi Coprocessor High Performance Programming
Author: James Jeffers,James Reinders
Publsiher: Unknown
Total Pages: 432
Release: 2013
ISBN 10: 1928374650XXX
ISBN 13: OCLC:1112602463
Language: EN, FR, DE, ES & NL

Intel Xeon Phi Coprocessor High Performance Programming Book Review:

Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products. This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture. A practical guide to the essentials of the Intel Xeon Phi coprocessor Presents best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming model Includes simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational product Covers wide vectors, many cores, many threads and high bandwidth cache/memory architecture.

Intel Xeon Phi Coprocessor Architecture and Tools

Intel Xeon Phi Coprocessor Architecture and Tools
Author: Rezaur Rahman
Publsiher: Apress
Total Pages: 232
Release: 2013-09-26
ISBN 10: 1430259272
ISBN 13: 9781430259275
Language: EN, FR, DE, ES & NL

Intel Xeon Phi Coprocessor Architecture and Tools Book Review:

Intel® Xeon PhiTM Coprocessor Architecture and Tools: The Guide for Application Developers provides developers a comprehensive introduction and in-depth look at the Intel Xeon Phi coprocessor architecture and the corresponding parallel data structure tools and algorithms used in the various technical computing applications for which it is suitable. It also examines the source code-level optimizations that can be performed to exploit the powerful features of the processor. Xeon Phi is at the heart of world’s fastest commercial supercomputer, which thanks to the massively parallel computing capabilities of Intel Xeon Phi processors coupled with Xeon Phi coprocessors attained 33.86 teraflops of benchmark performance in 2013. Extracting such stellar performance in real-world applications requires a sophisticated understanding of the complex interaction among hardware components, Xeon Phi cores, and the applications running on them. In this book, Rezaur Rahman, an Intel leader in the development of the Xeon Phi coprocessor and the optimization of its applications, presents and details all the features of Xeon Phi core design that are relevant to the practice of application developers, such as its vector units, hardware multithreading, cache hierarchy, and host-to-coprocessor communication channels. Building on this foundation, he shows developers how to solve real-world technical computing problems by selecting, deploying, and optimizing the available algorithms and data structure alternatives matching Xeon Phi’s hardware characteristics. From Rahman’s practical descriptions and extensive code examples, the reader will gain a working knowledge of the Xeon Phi vector instruction set and the Xeon Phi microarchitecture whereby cores execute 512-bit instruction streams in parallel.

High Performance Parallelism Pearls Volume Two

High Performance Parallelism Pearls Volume Two
Author: Jim Jeffers,James Reinders
Publsiher: Morgan Kaufmann Publishers
Total Pages: 592
Release: 2015-07-23
ISBN 10: 9780128038192
ISBN 13: 0128038195
Language: EN, FR, DE, ES & NL

High Performance Parallelism Pearls Volume Two Book Review:

High Performance Parallelism Pearls Volume 2 offers another set of examples that demonstrate how to leverage parallelism. Similar to Volume 1, the techniques included here explain how to use processors and coprocessors with the same programming - illustrating the most effective ways to combine Xeon Phi coprocessors with Xeon and other multicore processors. The book includes examples of successful programming efforts, drawn from across industries and domains such as biomed, genetics, finance, manufacturing, imaging, and more. Each chapter in this edited work includes detailed explanations of the programming techniques used, while showing high performance results on both Intel Xeon Phi coprocessors and multicore processors. Learn from dozens of new examples and case studies illustrating "success stories" demonstrating not just the features of Xeon-powered systems, but also how to leverage parallelism across these heterogeneous systems. Promotes write-once, run-anywhere coding, showing how to code for high performance on multicore processors and Xeon Phi Examples from multiple vertical domains illustrating real-world use of Xeon Phi coprocessors Source code available for download to facilitate further exploration

Intel Xeon Phi Coprocessor High Performance Programming

Intel Xeon Phi Coprocessor High Performance Programming
Author: James Jeffers,James Reinders
Publsiher: Newnes
Total Pages: 432
Release: 2013-02-11
ISBN 10: 0124104940
ISBN 13: 9780124104945
Language: EN, FR, DE, ES & NL

Intel Xeon Phi Coprocessor High Performance Programming Book Review:

Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products. This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture. A practical guide to the essentials of the Intel Xeon Phi coprocessor Presents best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming model Includes simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational product Covers wide vectors, many cores, many threads and high bandwidth cache/memory architecture

Scientific Programming and Computer Architecture

Scientific Programming and Computer Architecture
Author: Divakar Viswanath
Publsiher: MIT Press
Total Pages: 624
Release: 2017-07-28
ISBN 10: 0262036290
ISBN 13: 9780262036290
Language: EN, FR, DE, ES & NL

Scientific Programming and Computer Architecture Book Review:

A variety of programming models relevant to scientists explained, with an emphasis on how programming constructs map to parts of the computer. What makes computer programs fast or slow? To answer this question, we have to get behind the abstractions of programming languages and look at how a computer really works. This book examines and explains a variety of scientific programming models (programming models relevant to scientists) with an emphasis on how programming constructs map to different parts of the computer's architecture. Two themes emerge: program speed and program modularity. Throughout this book, the premise is to "get under the hood," and the discussion is tied to specific programs. The book digs into linkers, compilers, operating systems, and computer architecture to understand how the different parts of the computer interact with programs. It begins with a review of C/C++ and explanations of how libraries, linkers, and Makefiles work. Programming models covered include Pthreads, OpenMP, MPI, TCP/IP, and CUDA.The emphasis on how computers work leads the reader into computer architecture and occasionally into the operating system kernel. The operating system studied is Linux, the preferred platform for scientific computing. Linux is also open source, which allows users to peer into its inner workings. A brief appendix provides a useful table of machines used to time programs. The book's website (https://github.com/divakarvi/bk-spca) has all the programs described in the book as well as a link to the html text.

Structured Parallel Programming

Structured Parallel Programming
Author: Michael D. McCool,Arch D. Robison,James Reinders
Publsiher: Elsevier
Total Pages: 406
Release: 2012
ISBN 10: 0124159931
ISBN 13: 9780124159938
Language: EN, FR, DE, ES & NL

Structured Parallel Programming Book Review:

Programming is now parallel programming. Much as structured programming revolutionized traditional serial programming decades ago, a new kind of structured programming, based on patterns, is relevant to parallel programming today. Parallel computing experts and industry insiders Michael McCool, Arch Robison, and James Reinders describe how to design and implement maintainable and efficient parallel algorithms using a pattern-based approach. They present both theory and practice, and give detailed concrete examples using multiple programming models. Examples are primarily given using two of the most popular and cutting edge programming models for parallel programming: Threading Building Blocks, and Cilk Plus. These architecture-independent models enable easy integration into existing applications, preserve investments in existing code, and speed the development of parallel applications. Examples from realistic contexts illustrate patterns and themes in parallel algorithm design that are widely applicable regardless of implementation technology. The patterns-based approach offers structure and insight that developers can apply to a variety of parallel programming models Develops a composable, structured, scalable, and machine-independent approach to parallel computing Includes detailed examples in both Cilk Plus and the latest Threading Building Blocks, which support a wide variety of computers

High Performance Parallelism Pearls Volume Two

High Performance Parallelism Pearls Volume Two
Author: Jim Jeffers,James Reinders
Publsiher: Morgan Kaufmann
Total Pages: 592
Release: 2015-07-28
ISBN 10: 012803890X
ISBN 13: 9780128038901
Language: EN, FR, DE, ES & NL

High Performance Parallelism Pearls Volume Two Book Review:

High Performance Parallelism Pearls Volume 2 offers another set of examples that demonstrate how to leverage parallelism. Similar to Volume 1, the techniques included here explain how to use processors and coprocessors with the same programming – illustrating the most effective ways to combine Xeon Phi coprocessors with Xeon and other multicore processors. The book includes examples of successful programming efforts, drawn from across industries and domains such as biomed, genetics, finance, manufacturing, imaging, and more. Each chapter in this edited work includes detailed explanations of the programming techniques used, while showing high performance results on both Intel Xeon Phi coprocessors and multicore processors. Learn from dozens of new examples and case studies illustrating "success stories" demonstrating not just the features of Xeon-powered systems, but also how to leverage parallelism across these heterogeneous systems. Promotes write-once, run-anywhere coding, showing how to code for high performance on multicore processors and Xeon Phi Examples from multiple vertical domains illustrating real-world use of Xeon Phi coprocessors Source code available for download to facilitate further exploration

Applied Parallel Computing

Applied Parallel Computing
Author: Jack Dongarra,Kaj Madsen,Jerzy Wasniewski
Publsiher: Springer
Total Pages: 1174
Release: 2006-02-27
ISBN 10: 354033498X
ISBN 13: 9783540334989
Language: EN, FR, DE, ES & NL

Applied Parallel Computing Book Review:

This book constitutes the refereed proceedings of the 7th International Conference on Applied Parallel Computing, PARA 2004, held in June 2004. The 118 revised full papers presented together with five invited lectures and 15 contributed talks were carefully reviewed and selected for inclusion in the proceedings. The papers are organized in topical sections.

Parallel Programming and Optimization with Intel Xeon Phi Coprocessors

Parallel Programming and Optimization with Intel   Xeon Phi Coprocessors
Author: Andrey Vladimirov,Ryo Asai,Vadim Karpusenko
Publsiher: Unknown
Total Pages: 135
Release: 2015-05-08
ISBN 10: 9780988523401
ISBN 13: 098852340X
Language: EN, FR, DE, ES & NL

Parallel Programming and Optimization with Intel Xeon Phi Coprocessors Book Review:

Intel Threading Building Blocks

Intel Threading Building Blocks
Author: James Reinders
Publsiher: "O'Reilly Media, Inc."
Total Pages: 303
Release: 2007-10-02
ISBN 10: 0596514808
ISBN 13: 9780596514808
Language: EN, FR, DE, ES & NL

Intel Threading Building Blocks Book Review:

Book explains how to maximize the benefits of Intel's new dual-core and multi-core processors through a portable C++ library that works on Windows, Linux, Macintosh, and Unix systems.

High Performance Computing on the Intel Xeon PhiTM

High Performance Computing on the Intel   Xeon PhiTM
Author: Endong Wang,Qing Zhang,Bo Shen,Guangyong Zhang,Xiaowei Lu,Qing Wu,Yajuan Wang
Publsiher: Springer
Total Pages: 338
Release: 2014-06-26
ISBN 10: 331906486X
ISBN 13: 9783319064864
Language: EN, FR, DE, ES & NL

High Performance Computing on the Intel Xeon PhiTM Book Review:

The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon PhiTM series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors’ first-hand optimization experience. The material is organized in three sections. The first section, “Basics of MIC”, introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on “Performance Optimization” explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, “Project development” presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC. This book appeals to two main audiences: First, software developers for HPC applications – it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing – it will guide them on how to push the limits of system performance for HPC applications.

High Performance Parallelism Pearls Volume One

High Performance Parallelism Pearls Volume One
Author: James Reinders,James Jeffers
Publsiher: Morgan Kaufmann
Total Pages: 600
Release: 2014-11-04
ISBN 10: 0128021993
ISBN 13: 9780128021996
Language: EN, FR, DE, ES & NL

High Performance Parallelism Pearls Volume One Book Review:

High Performance Parallelism Pearls shows how to leverage parallelism on processors and coprocessors with the same programming – illustrating the most effective ways to better tap the computational potential of systems with Intel Xeon Phi coprocessors and Intel Xeon processors or other multicore processors. The book includes examples of successful programming efforts, drawn from across industries and domains such as chemistry, engineering, and environmental science. Each chapter in this edited work includes detailed explanations of the programming techniques used, while showing high performance results on both Intel Xeon Phi coprocessors and multicore processors. Learn from dozens of new examples and case studies illustrating "success stories" demonstrating not just the features of these powerful systems, but also how to leverage parallelism across these heterogeneous systems. Promotes consistent standards-based programming, showing in detail how to code for high performance on multicore processors and Intel® Xeon PhiTM Examples from multiple vertical domains illustrating parallel optimizations to modernize real-world codes Source code available for download to facilitate further exploration

Euro Par 2017 Parallel Processing

Euro Par 2017  Parallel Processing
Author: Francisco F. Rivera,Tomás F. Pena,José C. Cabaleiro
Publsiher: Springer
Total Pages: 725
Release: 2017-08-18
ISBN 10: 3319642030
ISBN 13: 9783319642031
Language: EN, FR, DE, ES & NL

Euro Par 2017 Parallel Processing Book Review:

This book constitutes the proceedings of the 23rd International Conference on Parallel and Distributed Computing, Euro-Par 2017, held in Santiago de Compostela, Spain, in August/September 2017. The 50 revised full papers presented together with 2 abstract of invited talks and 1 invited paper were carefully reviewed and selected from 176 submissions. The papers are organized in the following topical sections: support tools and environments; performance and power modeling, prediction and evaluation; scheduling and load balancing; high performance architectures and compilers; parallel and distributed data management and analytics; cluster and cloud computing; distributed systems and algorithms; parallel and distributed programming, interfaces and languages; multicore and manycore parallelism; theory and algorithms for parallel computation and networking; prallel numerical methods and applications; and accelerator computing.

High Performance Computing

High Performance Computing
Author: Julian M. Kunkel,Rio Yokota,Michela Taufer,John Shalf
Publsiher: Springer
Total Pages: 743
Release: 2017-10-18
ISBN 10: 331967630X
ISBN 13: 9783319676302
Language: EN, FR, DE, ES & NL

High Performance Computing Book Review:

This book constitutes revised selected papers from 10 workshops that were held as the ISC High Performance 2017 conference in Frankfurt, Germany, in June 2017. The 59 papers presented in this volume were carefully reviewed and selected for inclusion in this book. They stem from the following workshops: Workshop on Virtualization in High-Performance Cloud Computing (VHPC) Visualization at Scale: Deployment Case Studies and Experience Reports International Workshop on Performance Portable Programming Models for Accelerators (P^3MA) OpenPOWER for HPC (IWOPH) International Workshop on Data Reduction for Big Scientific Data (DRBSD) International Workshop on Communication Architectures for HPC, Big Data, Deep Learning and Clouds at Extreme Scale Workshop on HPC Computing in a Post Moore's Law World (HCPM) HPC I/O in the Data Center ( HPC-IODC) Workshop on Performance and Scalability of Storage Systems (WOPSSS) IXPUG: Experiences on Intel Knights Landing at the One Year Mark International Workshop on Communication Architectures for HPC, Big Data, Deep Learning and Clouds at Extreme Scale (ExaComm)

VTune Performance Analyzer Essentials

VTune Performance Analyzer Essentials
Author: James Reinders
Publsiher: Unknown
Total Pages: 455
Release: 2005
ISBN 10: 9780974364957
ISBN 13: 0974364959
Language: EN, FR, DE, ES & NL

VTune Performance Analyzer Essentials Book Review:

Annotation VTune performance tools "illuminate" your system and everything running on it. This book is a guide for software application developers, software architects, quality assurance testers, and system integrators who wish to use the VTune analyzer to take the guesswork out of software tuning.

High Performance Modelling and Simulation for Big Data Applications

High Performance Modelling and Simulation for Big Data Applications
Author: Joanna Kołodziej,Horacio González-Vélez
Publsiher: Springer
Total Pages: 352
Release: 2019-03-25
ISBN 10: 3030162729
ISBN 13: 9783030162726
Language: EN, FR, DE, ES & NL

High Performance Modelling and Simulation for Big Data Applications Book Review:

This open access book was prepared as a Final Publication of the COST Action IC1406 “High-Performance Modelling and Simulation for Big Data Applications (cHiPSet)“ project. Long considered important pillars of the scientific method, Modelling and Simulation have evolved from traditional discrete numerical methods to complex data-intensive continuous analytical optimisations. Resolution, scale, and accuracy have become essential to predict and analyse natural and complex systems in science and engineering. When their level of abstraction raises to have a better discernment of the domain at hand, their representation gets increasingly demanding for computational and data resources. On the other hand, High Performance Computing typically entails the effective use of parallel and distributed processing units coupled with efficient storage, communication and visualisation systems to underpin complex data-intensive applications in distinct scientific and technical domains. It is then arguably required to have a seamless interaction of High Performance Computing with Modelling and Simulation in order to store, compute, analyse, and visualise large data sets in science and engineering. Funded by the European Commission, cHiPSet has provided a dynamic trans-European forum for their members and distinguished guests to openly discuss novel perspectives and topics of interests for these two communities. This cHiPSet compendium presents a set of selected case studies related to healthcare, biological data, computational advertising, multimedia, finance, bioinformatics, and telecommunications.

High Performance Parallelism Pearls Volume One

High Performance Parallelism Pearls Volume One
Author: James Reinders,James Jeffers
Publsiher: Morgan Kaufmann
Total Pages: 600
Release: 2014-11-17
ISBN 10: 9780128021187
ISBN 13: 0128021187
Language: EN, FR, DE, ES & NL

High Performance Parallelism Pearls Volume One Book Review:

High Performance Parallelism Pearls shows how to leverage parallelism on processors and coprocessors with the same programming - illustrating the most effective ways to better tap the computational potential of systems with Intel Xeon Phi coprocessors and Intel Xeon processors or other multicore processors. The book includes examples of successful programming efforts, drawn from across industries and domains such as chemistry, engineering, and environmental science. Each chapter in this edited work includes detailed explanations of the programming techniques used, while showing high performance results on both Intel Xeon Phi coprocessors and multicore processors. Learn from dozens of new examples and case studies illustrating "success stories" demonstrating not just the features of these powerful systems, but also how to leverage parallelism across these heterogeneous systems. Promotes consistent standards-based programming, showing in detail how to code for high performance on multicore processors and Intel® Xeon PhiT Examples from multiple vertical domains illustrating parallel optimizations to modernize real-world codes Source code available for download to facilitate further exploration

Optimizing HPC Applications with Intel Cluster Tools

Optimizing HPC Applications with Intel Cluster Tools
Author: Alexander Supalov,Andrey Semin,Christopher Dahnken,Michael Klemm
Publsiher: Apress
Total Pages: 300
Release: 2014-10-09
ISBN 10: 1430264977
ISBN 13: 9781430264972
Language: EN, FR, DE, ES & NL

Optimizing HPC Applications with Intel Cluster Tools Book Review:

Optimizing HPC Applications with Intel® Cluster Tools takes the reader on a tour of the fast-growing area of high performance computing and the optimization of hybrid programs. These programs typically combine distributed memory and shared memory programming models and use the Message Passing Interface (MPI) and OpenMP for multi-threading to achieve the ultimate goal of high performance at low power consumption on enterprise-class workstations and compute clusters. The book focuses on optimization for clusters consisting of the Intel® Xeon processor, but the optimization methodologies also apply to the Intel® Xeon Phi™ coprocessor and heterogeneous clusters mixing both architectures. Besides the tutorial and reference content, the authors address and refute many myths and misconceptions surrounding the topic. The text is augmented and enriched by descriptions of real-life situations.