Architecture Design for Soft Errors

Architecture Design for Soft Errors
Author: Shubu Mukherjee
Publsiher: Morgan Kaufmann
Total Pages: 360
Release: 2011-08-29
ISBN 10: 9780080558325
ISBN 13: 0080558321
Language: EN, FR, DE, ES & NL

Architecture Design for Soft Errors Book Review:

Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines. This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture. Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors Shows readers how to quantify their soft error reliability Provides state-of-the-art techniques to protect against soft errors

FPGAs and Parallel Architectures for Aerospace Applications

FPGAs and Parallel Architectures for Aerospace Applications
Author: Fernanda Kastensmidt,Paolo Rech
Publsiher: Springer
Total Pages: 325
Release: 2015-12-07
ISBN 10: 3319143522
ISBN 13: 9783319143521
Language: EN, FR, DE, ES & NL

FPGAs and Parallel Architectures for Aerospace Applications Book Review:

This book introduces the concepts of soft errors in FPGAs, as well as the motivation for using commercial, off-the-shelf (COTS) FPGAs in mission-critical and remote applications, such as aerospace. The authors describe the effects of radiation in FPGAs, present a large set of soft-error mitigation techniques that can be applied in these circuits, as well as methods for qualifying these circuits under radiation. Coverage includes radiation effects in FPGAs, fault-tolerant techniques for FPGAs, use of COTS FPGAs in aerospace applications, experimental data of FPGAs under radiation, FPGA embedded processors under radiation and fault injection in FPGAs. Since dedicated parallel processing architectures such as GPUs have become more desirable in aerospace applications due to high computational power, GPU analysis under radiation is also discussed.

Soft Errors

Soft Errors
Author: Jean-Luc Autran,Daniela Munteanu
Publsiher: CRC Press
Total Pages: 439
Release: 2015-02-25
ISBN 10: 146659084X
ISBN 13: 9781466590847
Language: EN, FR, DE, ES & NL

Soft Errors Book Review:

Soft errors are a multifaceted issue at the crossroads of applied physics and engineering sciences. Soft errors are by nature multiscale and multiphysics problems that combine not only nuclear and semiconductor physics, material sciences, circuit design, and chip architecture and operation, but also cosmic-ray physics, natural radioactivity issues, particle detection, and related instrumentation. Soft Errors: From Particles to Circuits addresses the problem of soft errors in digital integrated circuits subjected to the terrestrial natural radiation environment—one of the most important primary limits for modern digital electronic reliability. Covering the fundamentals of soft errors as well as engineering considerations and technological aspects, this robust text: Discusses the basics of the natural radiation environment, particle interactions with matter, and soft-error mechanisms Details instrumentation developments in the fields of environment characterization, particle detection, and real-time and accelerated tests Describes the latest computational developments, modeling, and simulation strategies for the soft error-rate estimation in digital circuits Explores trends for future technological nodes and emerging devices Soft Errors: From Particles to Circuits presents the state of the art of this complex subject, providing comprehensive knowledge of the complete chain of the physics of soft errors. The book makes an ideal text for introductory graduate-level courses, offers academic researchers a specialized overview, and serves as a practical guide for semiconductor industry engineers or application engineers.

Soft Error Reliability Using Virtual Platforms

Soft Error Reliability Using Virtual Platforms
Author: Felipe Rocha da Rosa
Publsiher: Springer Nature
Total Pages: 329
Release:
ISBN 10: 3030557049
ISBN 13: 9783030557041
Language: EN, FR, DE, ES & NL

Soft Error Reliability Using Virtual Platforms Book Review:

Soft Errors in Modern Electronic Systems

Soft Errors in Modern Electronic Systems
Author: Michael Nicolaidis
Publsiher: Springer Science & Business Media
Total Pages: 318
Release: 2010-09-24
ISBN 10: 9781441969934
ISBN 13: 1441969934
Language: EN, FR, DE, ES & NL

Soft Errors in Modern Electronic Systems Book Review:

This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modelling and simulation), hardware fault injection, accelerated radiation testing and natural environment testing, soft error oriented test structures, process-level, device-level, cell-level, circuit-level, architectural-level, software level and system level soft error mitigation techniques. The book contains a comprehensive presentation of most recent advances on understanding, qualifying and mitigating the soft error effect in advanced electronic systems, presented by academia and industry experts in reliability, fault tolerance, EDA, processor, SoC and system design, and in particular, experts from industries that have faced the soft error impact in terms of product reliability and related business issues and were in the forefront of the countermeasures taken by these companies at multiple levels in order to mitigate the soft error effects at a cost acceptable for commercial products. In a fast moving field, where the impact on ground level electronics is very recent and its severity is steadily increasing at each new process node, impacting one after another various industry sectors (as an example, the Automotive Electronics Council comes to publish qualification requirements on soft errors), research and technology developments and industrial practices have evolve very fast, outdating the most recent books edited at 2004.

Resilient Architecture Design for Voltage Variation

Resilient Architecture Design for Voltage Variation
Author: Vijay Janapa Reddi,Meeta Sharma Gupta
Publsiher: Morgan & Claypool Publishers
Total Pages: 138
Release: 2013-05-01
ISBN 10: 1608456382
ISBN 13: 9781608456383
Language: EN, FR, DE, ES & NL

Resilient Architecture Design for Voltage Variation Book Review:

Shrinking feature size and diminishing supply voltage are making circuits sensitive to supply voltage fluctuations within the microprocessor, caused by normal workload activity changes. If left unattended, voltage fluctuations can lead to timing violations or even transistor lifetime issues that degrade processor robustness. Mechanisms that learn to tolerate, avoid, and eliminate voltage fluctuations based on program and microarchitectural events can help steer the processor clear of danger, thus enabling tighter voltage margins that improve performance or lower power consumption. We describe the problem of voltage variation and the factors that influence this variation during processor design and operation. We also describe a variety of runtime hardware and software mitigation techniques that either tolerate, avoid, and/or eliminate voltage violations. We hope processor architects will find the information useful since tolerance, avoidance, and elimination are generalizable constructs that can serve as a basis for addressing other reliability challenges as well. Table of Contents: Introduction / Modeling Voltage Variation / Understanding the Characteristics of Voltage Variation / Traditional Solutions and Emerging Solution Forecast / Allowing and Tolerating Voltage Emergencies / Predicting and Avoiding Voltage Emergencies / Eliminiating Recurring Voltage Emergencies / Future Directions on Resiliency

Soft Error Reliability of VLSI Circuits

Soft Error Reliability of VLSI Circuits
Author: Behnam Ghavami,Mohsen Raji
Publsiher: Springer Nature
Total Pages: 114
Release: 2020-11-14
ISBN 10: 3030516105
ISBN 13: 9783030516109
Language: EN, FR, DE, ES & NL

Soft Error Reliability of VLSI Circuits Book Review:

This book is intended for readers who are interested in the design of robust and reliable electronic digital systems. The authors cover emerging trends in design of today’s reliable electronic systems which are applicable to safety-critical applications, such as automotive or healthcare electronic systems. The emphasis is on modeling approaches and algorithms for analysis and mitigation of soft errors in nano-scale CMOS digital circuits, using techniques that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. The authors introduce software tools for analysis and mitigation of soft errors in electronic systems, which can be integrated easily with design flows. In addition to discussing soft error aware analysis techniques for combinational logic, the authors also describe new soft error mitigation strategies targeting commercial digital circuits. Coverage includes novel Soft Error Rate (SER) analysis techniques such as process variation aware SER estimation and GPU accelerated SER analysis techniques, in addition to SER reduction methods such as gate sizing and logic restructuring based SER techniques.

Fault Tolerant Computer Architecture

Fault Tolerant Computer Architecture
Author: Daniel Sorin
Publsiher: Morgan & Claypool Publishers
Total Pages: 104
Release: 2009-07-08
ISBN 10: 1598299549
ISBN 13: 9781598299540
Language: EN, FR, DE, ES & NL

Fault Tolerant Computer Architecture Book Review:

For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry. Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future

Dependability in Electronic Systems

Dependability in Electronic Systems
Author: Nobuyasu Kanekawa,Eishi H. Ibe,Takashi Suga,Yutaka Uematsu
Publsiher: Springer Science & Business Media
Total Pages: 204
Release: 2010-11-08
ISBN 10: 9781441967152
ISBN 13: 144196715X
Language: EN, FR, DE, ES & NL

Dependability in Electronic Systems Book Review:

This book covers the practical application of dependable electronic systems in real industry, such as space, train control and automotive control systems, and network servers/routers. The impact from intermittent errors caused by environmental radiation (neutrons and alpha particles) and EMI (Electro-Magnetic Interference) are introduced together with their most advanced countermeasures. Power Integration is included as one of the most important bases of dependability in electronic systems. Fundamental technical background is provided, along with practical design examples. Readers will obtain an overall picture of dependability from failure causes to countermeasures for their relevant systems or products, and therefore, will be able to select the best choice for maximum dependability.

FPGA Architecture

FPGA Architecture
Author: Ian Kuon,Russell Tessier,Jonathan Rose
Publsiher: Now Publishers Inc
Total Pages: 122
Release: 2008
ISBN 10: 1601981260
ISBN 13: 9781601981264
Language: EN, FR, DE, ES & NL

FPGA Architecture Book Review:

FPGA Architecture: Survey and Challenges reviews the historical development of programmable logic devices, the fundamental programming technologies that the programmability is built on, and then describes the basic understandings gleaned from research on architectures. It is an invaluable reference for engineers and computer scientists. It is also an excellent primer for senior or graduate-level students in electrical engineering or computer science.

Advances in Computer Systems Architecture

Advances in Computer Systems Architecture
Author: Thambipillai Srikanthan,Jingling Xue
Publsiher: Springer Science & Business Media
Total Pages: 833
Release: 2005-10-13
ISBN 10: 9783540296430
ISBN 13: 3540296433
Language: EN, FR, DE, ES & NL

Advances in Computer Systems Architecture Book Review:

This book constitutes the refereed proceedings of the 10th Asia-Pacific Computer Systems Architecture Conference, ACSAC 2005, held in Singapore in October 2005. The 65 revised full papers presented were carefully reviewed and selected from 173 submissions. The papers are organized in topical sections on energy efficient and power aware techniques, methodologies and architectures for application-specific systems, processor architectures and microarchitectures, high-reliability and fault-tolerant architectures, compiler and OS for emerging architectures, data value predictions, reconfigurable computing systems and polymorphic architectures, interconnect networks and network interfaces, parallel architectures and computation models, hardware-software partitioning, verification, and testing of complex architectures, architectures for secured computing, simulation and performance evaluation, architectures for emerging technologies and applications, and memory systems hierarchy and management.

Advances in Computer Systems Architecture

Advances in Computer Systems Architecture
Author: ACSAC (Asia-Pacific Computer Systems Architecture Conference)
Publsiher: Springer Science & Business Media
Total Pages: 598
Release: 2004-09-14
ISBN 10: 3540230033
ISBN 13: 9783540230038
Language: EN, FR, DE, ES & NL

Advances in Computer Systems Architecture Book Review:

This book constitutes the refereed proceedings of the 9th Asia-Pacific Computer Systems Architecture Conference, ACSAC 2004, held in Beijing, China in September 2004. The 45 revised full papers presented were carefully reviewed and selected from 154 submissions. The papers are organized in topical sections on cache and memory, reconfigurable and embedded architectures, processor architecture and design, power and energy management, compiler and operating systems issues, application-specific systems, interconnection networks, prediction techniques, parallel architectures and programming, microarchitecture design and evaluation, memory and I/O systems, and others.

Resistive Random Access Memory RRAM

Resistive Random Access Memory  RRAM
Author: Shimeng Yu
Publsiher: Morgan & Claypool Publishers
Total Pages: 79
Release: 2016-03-18
ISBN 10: 162705930X
ISBN 13: 9781627059305
Language: EN, FR, DE, ES & NL

Resistive Random Access Memory RRAM Book Review:

RRAM technology has made significant progress in the past decade as a competitive candidate for the next generation non-volatile memory (NVM). This lecture is a comprehensive tutorial of metal oxide-based RRAM technology from device fabrication to array architecture design. State-of-the-art RRAM device performances, characterization, and modeling techniques are summarized, and the design considerations of the RRAM integration to large-scale array with peripheral circuits are discussed. Chapter 2 introduces the RRAM device fabrication techniques and methods to eliminate the forming process, and will show its scalability down to sub-10 nm regime. Then the device performances such as programming speed, variability control, and multi-level operation are presented, and finally the reliability issues such as cycling endurance and data retention are discussed. Chapter 3 discusses the RRAM physical mechanism, and the materials characterization techniques to observe the conductive filaments and the electrical characterization techniques to study the electronic conduction processes. It also presents the numerical device modeling techniques for simulating the evolution of the conductive filaments as well as the compact device modeling techniques for circuit-level design. Chapter 4 discusses the two common RRAM array architectures for large-scale integration: one-transistor-one-resistor (1T1R) and cross-point architecture with selector. The write/read schemes are presented and the peripheral circuitry design considerations are discussed. Finally, a 3D integration approach is introduced for building ultra-high density RRAM array. Chapter 5 is a brief summary and will give an outlook for RRAM’s potential novel applications beyond the NVM applications.

VLSI

VLSI
Author: Tomasz Wojcicki
Publsiher: CRC Press
Total Pages: 486
Release: 2017-12-19
ISBN 10: 1466599103
ISBN 13: 9781466599109
Language: EN, FR, DE, ES & NL

VLSI Book Review:

Recently the world celebrated the 60th anniversary of the invention of the first transistor. The first integrated circuit (IC) was built a decade later, with the first microprocessor designed in the early 1970s. Today, ICs are a part of nearly every aspect of our daily lives. They help us live longer and more comfortably, and do more, faster. All this is possible because of the relentless search for new materials, circuit designs, and ideas happening on a daily basis at industrial and academic institutions around the globe. Showcasing the latest advances in very-large-scale integrated (VLSI) circuits, VLSI: Circuits for Emerging Applications provides a balanced view of industrial and academic developments beyond silicon and complementary metal–oxide–semiconductor (CMOS) technology. From quantum-dot cellular automata (QCA) to chips for cochlear implants, this must-have resource: Investigates the trend of combining multiple cores in a single chip to boost performance of the overall system Describes a novel approach to enable physically unclonable functions (PUFs) using intrinsic features of a VLSI chip Examines the VLSI implementations of major symmetric and asymmetric key cryptographic algorithms, hash functions, and digital signatures Discusses nonvolatile memories such as resistive random-access memory (Re-RAM), magneto-resistive RAM (MRAM), and floating-body RAM (FB-RAM) Explores organic transistors, soft errors, photonics, nanoelectromechanical (NEM) relays, reversible computation, bioinformatics, asynchronous logic, and more VLSI: Circuits for Emerging Applications presents cutting-edge research, design architectures, materials, and uses for VLSI circuits, offering valuable insight into the current state of the art of micro- and nanoelectronics.

Design and Test Technology for Dependable Systems on chip

Design and Test Technology for Dependable Systems on chip
Author: Raimund Ubar,Jaan Raik,Heinrich Theodor Vierhaus
Publsiher: IGI Global
Total Pages: 550
Release: 2011-01-01
ISBN 10: 1609602145
ISBN 13: 9781609602147
Language: EN, FR, DE, ES & NL

Design and Test Technology for Dependable Systems on chip Book Review:

"This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--

Processor Design

Processor Design
Author: Jari Nurmi
Publsiher: Springer Science & Business Media
Total Pages: 526
Release: 2007-07-26
ISBN 10: 1402055307
ISBN 13: 9781402055300
Language: EN, FR, DE, ES & NL

Processor Design Book Review:

Here is an extremely useful book that provides insight into a number of different flavors of processor architectures and their design, software tool generation, implementation, and verification. After a brief introduction to processor architectures and how processor designers have sometimes failed to deliver what was expected, the authors introduce a generic flow for embedded on-chip processor design and start to explore the vast design space of on-chip processing. The authors cover a number of different types of processor core.

Microservice Architecture

Microservice Architecture
Author: Irakli Nadareishvili,Ronnie Mitra,Matt McLarty,Mike Amundsen
Publsiher: "O'Reilly Media, Inc."
Total Pages: 146
Release: 2016-07-18
ISBN 10: 1491956348
ISBN 13: 9781491956342
Language: EN, FR, DE, ES & NL

Microservice Architecture Book Review:

Microservices can have a positive impact on your enterprise—just ask Amazon and Netflix—but you can fall into many traps if you don’t approach them in the right way. This practical guide covers the entire microservices landscape, including the principles, technologies, and methodologies of this unique, modular style of system building. You’ll learn about the experiences of organizations around the globe that have successfully adopted microservices. In three parts, this book explains how these services work and what it means to build an application the Microservices Way. You’ll explore a design-based approach to microservice architecture with guidance for implementing various elements. And you’ll get a set of recipes and practices for meeting practical, organizational, and cultural challenges to microservice adoption. Learn how microservices can help you drive business objectives Examine the principles, practices, and culture that define microservice architectures Explore a model for creating complex systems and a design process for building a microservice architecture Learn the fundamental design concepts for individual microservices Delve into the operational elements of a microservices architecture, including containers and service discovery Discover how to handle the challenges of introducing microservice architecture in your organization

VLSI SoC Research Trends in VLSI and Systems on Chip

VLSI SoC  Research Trends in VLSI and Systems on Chip
Author: Giovanni De Micheli,Salvador Mir,Ricardo Reis
Publsiher: Springer
Total Pages: 394
Release: 2010-08-23
ISBN 10: 0387749098
ISBN 13: 9780387749099
Language: EN, FR, DE, ES & NL

VLSI SoC Research Trends in VLSI and Systems on Chip Book Review:

This book contains extended and revised versions of the best papers presented during the fourteenth IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration. This conference provides a forum to exchange ideas and show industrial and academic research results in microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels.

Computer Organization and Design

Computer Organization and Design
Author: David A. Patterson,John L. Hennessy
Publsiher: Elsevier
Total Pages: 656
Release: 2004-08-07
ISBN 10: 0080502571
ISBN 13: 9780080502571
Language: EN, FR, DE, ES & NL

Computer Organization and Design Book Review:

This best selling text on computer organization has been thoroughly updated to reflect the newest technologies. Examples highlight the latest processor designs, benchmarking standards, languages and tools. As with previous editions, a MIPs processor is the core used to present the fundamentals of hardware technologies at work in a computer system. The book presents an entire MIPS instruction set—instruction by instruction—the fundamentals of assembly language, computer arithmetic, pipelining, memory hierarchies and I/O. A new aspect of the third edition is the explicit connection between program performance and CPU performance. The authors show how hardware and software components--such as the specific algorithm, programming language, compiler, ISA and processor implementation--impact program performance. Throughout the book a new feature focusing on program performance describes how to search for bottlenecks and improve performance in various parts of the system. The book digs deeper into the hardware/software interface, presenting a complete view of the function of the programming language and compiler--crucial for understanding computer organization. A CD provides a toolkit of simulators and compilers along with tutorials for using them. For instructor resources click on the grey "companion site" button found on the right side of this page. This new edition represents a major revision. New to this edition: * Entire Text has been updated to reflect new technology * 70% new exercises. * Includes a CD loaded with software, projects and exercises to support courses using a number of tools * A new interior design presents defined terms in the margin for quick reference * A new feature, "Understanding Program Performance" focuses on performance from the programmer's perspective * Two sets of exercises and solutions, "For More Practice" and "In More Depth," are included on the CD * "Check Yourself" questions help students check their understanding of major concepts * "Computers In the Real World" feature illustrates the diversity of uses for information technology *More detail below...

Design of Soft Error Robust High Speed 64 bit Logarithmic Adder

Design of Soft Error Robust High Speed 64 bit Logarithmic Adder
Author: Jaspal Singh Shah
Publsiher: Anonim
Total Pages: 55
Release: 2008
ISBN 10:
ISBN 13: OCLC:613414457
Language: EN, FR, DE, ES & NL

Design of Soft Error Robust High Speed 64 bit Logarithmic Adder Book Review:

Continuous scaling of the transistor size and reduction of the operating voltage have led to a significant performance improvement of integrated circuits. However, the vulnerability of the scaled circuits to transient data upsets or soft errors, which are caused by alpha particles and cosmic neutrons, has emerged as a major reliability concern. In this thesis, we have investigated the effects of soft errors in combinational circuits and proposed soft error detection techniques for high speed adders. In particular, we have proposed an area-efficient 64-bit soft error robust logarithmic adder (SRA). The adder employs the carry merge Sklansky adder architecture in which carries are generated every 4 bits. Since the particle-induced transient, which is often referred to as a single event transient (SET) typically lasts for 100~200 ps, the adder uses time redundancy by sampling the sum outputs twice.